1. Field of the Invention
The present invention relates to a static semiconductor memory cell which stores data.
2. Description of the Background Art
FIG. 4 is a circuit diagram showing a static random access memory (in the following also referred to as "SRAM") included in a conventional static semiconductor memory device and its peripheral circuitry.
As shown in FIG. 4, the static semiconductor memory device is provided with, a word line WL, a bit line pair BL,/BL, SRAM cells M1, Mn arranged at their crossing, transfer gates 211, 212 and equalize/precharge circuits 200, 209 corresponding to each bit line pair BL,/BL, and a sense amplifier 215.
Each of SRAM cells M1, Mn includes two NMOS transistors 202, 205 and two inverters 203, 204.
FIG. 5 is a circuit diagram showing a configuration of each of SRAM cells M1, Mn shown in FIG. 4. Referring to FIG. 5, each of SRAM cells M1, Mn includes driver transistors 226, 227, access transistors 220, 221 and high resistance elements 222, 223.
In the following, a data read out operation of a conventional static semiconductor memory device in which SRAM cell M1 is selected will be described with reference to FIG. 4.
The potential of bit line pair BL,/BL is precharged to a high level (H: logical high). When word line WL is activated, potential of bit line pair BL,/BL changes according to information stored in SRAM cell M1. When word line WL is activated, transfer gate 211 corresponding to selected SRAM cell M1 is turned on simultaneously. Namely, only a column selection signal Y1 attains a high level. Column selection signals Y2-Yn attain a low level (L: logical low). Corresponding to the potential difference between bit lines BL and /BL, potential difference is generated between data line pair 213 and 214, which is amplified by sense amplifier 215.
However, in the conventional static semiconductor memory device as described above, at a low voltage, drivability suddenly decreases, so that the ratio of current drivability between driver transistors 226, 227 and access transistors 220, 221 decreases. Therefore stability is degraded causing destruction of data.